The parameter “Fast Command” (Optimization Mode or Top Performance) enables to set the amount of delays during exchange of data or commands between the processor and memory. This parameter may have the following values: Ultra, Fast and Normal (Turbo2, Turbo1 and Normal or Enabled and Disabled). But if the memory modules are not very qualitative, the speeding of information exchange may cause failures in operation of memory.
The parameter “CPU Fast String” specifies the possibility of direct request of processor to operating memory. This parameter may have the following values: Enabled and Disabled.
The parameter “SDRAM1T Command” (DDR Command Rate or DDR 1T/2T Item) enables to set the amount of delays during the exchange of commands between chipset and memory. This parameter has values “2T” or “Disabled” by default. If to set the values “1T” (Enabled), you can increase the effectiveness of interaction between memory and chipset that have a positive impact on the whole system.
The parameter “Chipset NA# Asserted” enables to specify the possibility of using the conveyor effect when the chipset informs about readiness of a new memory address before all the data in the current cycle will be processed. This parameter has got two values: Enabled and Disabled.
The parameter “CPU DRAM Back-Back Transaction” enables to switch on the possibility of fast writing of data packets transmitted by a processor in operating memory. This parameter has got two values: Enabled and Disabled. If you enable the fast and direct interaction between memory and processor, you will increase the speed of system operation.