Stabilization of Memory Operation. Part IV

You can control the above mechanisms by using the appropriate parameters of BIOS that are located in a section “Chipset futures Setup” (“Advanced Chipset Futures”).

There are BIOS parameters that influence the stabilization of memory operation:

  • The parameter “MD Drive Strength” enables to set the level of memory signals for memory modules. By default, this parameter has got the value “Normal” (or “Low”) that means a normal (or low) signal level. You may use the value “Hi” only during unstable operation of memory.
  • The parameter “DRAM Data Integrity Mode” (Data Integrity (PAR, ECC), Memory Parity/ECC Check, Memory ECC Mode) enables to indicate the use of Parity mechanism. This parameter may have the value “ECC” (Enabled) – the use of Parity, or the value “Non-ECC” (Disabled) – deactivating the Parity.
  • The parameter “DRAM ECC/Parity Select” enables to set the type of memory check when using modules with the Parity. This parameter may have two values: Parity (the use of Parity) or ECC (the use of an Error Control Code). All values of this parameter may be inaccessible if the parameter “DRAM Data Integrity Mode” has the value “Non-ECC” (Disabled).
  • The parameter “SDRAM ECC Setting” enables to indicate which control type of data storage should be used. This parameter may have the following values: Disabled – all control mechanisms are off; Check Only – the Parity Mechanism is off; Correct Error – an Error Control Code is used.